Student in the field of Computer Science.
I am a PhD student at INSA Lyon. I am working on arithmetic optimizations for high-level synthesis. My supervisor is Florent de Dinechin.
Build a VLIW processor based on the Vex/ST200 using High-Level Synthesis tools
It allowed me to discover processors behavior and their complexity. I had the opportunity to work with a good and friendly team that introduced me to High-Level Synthesis, which is a way to produce a hardware description from a C source code. If you are interested in reading my work, you can find it here (be aware that it is written in French).
I also performed an intership at Colorado State University, Fort Collins, CO, USA. I was working within the High Performance Computing team, called MELANGE. My internship topic was :
Develop a cycle-accurate simulator for a parallel programmable architecture called the Stencil Processing Unit (SPU). The SPU was proposed as an energy-efficient architecture to implement a richer class of programs that can be handled by GPUs (Graphics Processing Unit)
You can find my technical report here.
I performed my master's internship at CITI laboratory in Lyon. This is part of the INSA Lyon. This internship aimed at bringing together arithmetic optimizations and high-level synthesis (HLS). Indeed, HLS tools performs poorly on floating-point computation. Although it has been shown that using specialized operators can result in improved speed, resource usage and accuracy. We used a source-to-source compiler (GeCoS) to transform C source codes that are targetted to HLS tools. Our generated C code describes the behavior of the specialized operators such that the HLS tools will generate an accurate design. We based our transformations on FloPoCo's knowledge which is a generator of arithmetic cores.